High-voltage, field-effect transistors (HVFETs) are well known in the semiconductor arts. Many HVFETs employ a device structure that includes an extended drain region that supports or blocks the applied high-voltage (e.g., several hundred volts) when the device is in the “off” state. HVFETs of this type are commonly used in power conversion applications such as AC/DC converters for offline power supplies, motor controls, and so on. These devices can be switched at high voltages and achieve a high blocking voltage in the off state while minimizing the resistance to current flow in the “on” state. The blocking or breakdown voltage is generally denoted as Vbd or BV for short. The acronym Rds refers to the product of the resistance and surface area in the extended drain region, and is generally used to describe the on-state performance of the device.
In prior art vertical HVFET structures, a mesa or pillar of semiconductor material forms the extended drain or drift region for current flow in the on-state. The silicon pillar structure is typically formed in the shape of a racetrack, with the pillar structure being repeated in a direction perpendicular to the pillar length. FIG. 1 shows one end of a silicon pillar layout for a conventional high-voltage vertical transistor. This structure is characterized by a pair of long, straight fillet regions connected by a half-circular (i.e., radial) tip region. The pillar width (PW) in the tip and fillet regions is constant throughout. The vertical device structure is characterized by a trench gate formed near the top of the substrate, adjacent the sidewall regions of the pillar where a body region is disposed above the extended drain region. Application of an appropriate voltage potential to the gate causes a conductive channel to be formed along the vertical sidewall portion of the body region such that current may flow vertically through the semiconductor material, i.e., from a top surface of the substrate where the source region is disposed, through the drift region down to the bottom of the substrate where the drain region is located. The drift region is usually lightly doped to support high voltages applied to the drain when the device is off. The decrease in doping and increase in length of the extended drain region therefore has a deleterious effect on the on-state performance of the device, as both cause an increase in on-state resistance. In other words, conventional high-voltage FET designs are characterized by a trade-off between BV and Rds.